Module 6: Velocity Vector Stabilizer (VVS) Module 7: Timeline Interpolation (TLI) Module 8: Timeline Thruster (TLT)
void app_main(void) {... // Start the I2S Write task ret_val = xTaskCreatePinnedToCore(i2s_write_task, "ForI2sWrite", TASK_I2S_WRITE_STACKSIZE, NULL, TASK_I2S_WRITE_PRIORITY, NULL, TASK_I2S_WRITE_CORE); ESP_LOGI(TAG, "%s to create %s", ret_val == pdPASS?"Succeeded":"Failed", "i2s_write_task");...}
void IRAM_ATTR i2s_write_task(void *param){ static TU_ATTR_ALIGNED(32) DRAM_ATTR uint8_t local_buf[TRANSFER_BUFFER_SIZE * (TRANSFER_BUFFER_COUNT/2) ] = {0}; TickType_t xLastWakeTime = xTaskGetTickCount(); static size_t written = 0; static size_t got = 0; static int16_t i2s_size; i2s_size = g_ddc.uac_quality.frame_size>>I2S_BUFFER_STROKESIZE; while (1) { if (!g_ddc.uac_alt1_active) { vTaskDelayUntil(&xLastWakeTime, 1); continue; } // ---- I2S preroll ---- if (g_ddc.i2s_starting) { if (!i2s_preroll_done(i2s_size)) { continue; } g_ddc.i2s_starting = false; g_ddc.i2s_src_inited = true; continue; } // ---- Underrun monitoring ---- got = rb_available(&g_audio_ring); if (got < i2s_size) { g_ddc.ddc_ring_looses = g_ddc.ddc_ring_looses>=99?0:g_ddc.ddc_ring_looses+ 1; }#if DDC_LOG == 1 usb_packet_log_lastjoint(got);#endif // ---- VVS ---- g_ddc.i2s_src_phase_ratio = g_data_functions.pSRC_update_ratio(&g_ddc, g_cnt_ideal.delta_fb_q, g_cnt_ideal.source_clock_ratio); // ---- TLI ---- g_data_functions.pASRC_interpolate_ring(&g_audio_ring, local_buf, i2s_size, &g_ddc); // ---- Volume ---- if (g_ddc.uac_alt1_volume < 0) { g_data_functions.padjustVolume( local_buf, i2s_size, VOLUME_SCALE(g_ddc.uac_alt1_volume, vol_range.min) ); } // ---- TLT ---- i2s_channel_write(tx_handle, g_ddc.uac_alt1_muted ? g_silence : local_buf, i2s_size, &written, portMAX_DELAY); g_ddc.ddc_tx_size = got; }}