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Deep Abyss Audio (13) — Core’4 Timeline Dynamics Processor (TDP Phase) PopoDAC(ProAudio‑Spec USB DAC) DIY

‹ 2026/01/09 ›

Hello everyone. It’s freezing today…


But the wait is finally over.

Today we enter Core’4 — the Timeline Dynamics Processor, formerly known as the I2S Phase.


This is the summit.

The heart of the entire PopoDAC architecture.


Whether you’ve followed every episode so far, stumbled your way here without fully understanding why, or just happened to drop by—

this is the chapter where you finally witness the shocking capability of PopoDAC.


(Yes… it really does reach the class of that 〇ME device.)



What is the TDP Phase?

As the old name suggests, the TDP phase is responsible for the I2S output itself.


But PopoDAC does not perform a simple bucket‑relay transfer.

The output method is a particle‑level thruster powered by ASRC (Adaptive Sample Rate Conversion), operating at frame‑quantum precision.


If you’re thinking:

  • “What on earth are you talking about?”

…you’re not alone.

So let’s visualize it.



Conceptual Overview

The TDP phase is the functional block that transfers audio from UAC → I2S under the supervision of the CCC (Clock & Continuity Controller), using the MASTER RING as the authoritative timeline.


And yes—

D.J. Popo is here.


In extreme terms, the TDP’s job can be described as:

  • “A quantum‑handling D.J. Popo rearranging every audio particle on the timeline.”

This is the moment where the DDC stops being a mere packet forwarder and becomes an audio manipulator, delicately transferring and repositioning each quantum of sound.


“What does that actually mean?”

Let’s ask the core question:

What happens when digital audio is handled inside PopoDAC’s MTL (Multi‑Time‑Layer) as individual sample quanta?

As the stream flows, each quantum is re‑placed on the timeline.

This affects:

  • its length
  • its velocity
  • its resolution
  • and its temporal alignment

The packets arriving from the TDR phase (UAC phase) contain not only the main audio quanta, but also:

  • reflection quanta
  • background quanta
  • out‑of‑band quanta
  • and other micro‑energy components

Handling each of these particles with precision means PopoDAC can:

  • correctly re‑place them on the timeline
  • reconstruct spatial localization
  • rebuild the sound image
  • rebuild the acoustic space
  • and even optimize the energy of inaudible regions

This includes phenomena similar to what Dolby Atmos aims to express.


“Now do you see it?”

You’re starting to glimpse what ESP32‑S3 DIY can truly achieve—

and what PopoDAC is actually trying to do.


This is the point where the architecture stops being “a USB DAC project” and becomes a time‑axis engineering device.


Module Architecture of the TDP Phase

The TDP phase is composed of the following three modules:


Module 6: Velocity Vector Stabilizer (VVS)

Module 7: Timeline Interpolation (TLI)

Module 8: Timeline Thruster (TLT)


Everything handled here is fundamentally about the relationship with time.

It is crucial not to stare at the incoming PCM data “as-is.”

What matters is how each quantum relates to the timeline.

Module 6: VVS(Velocity Vector Stabilizer)

The VVS calculates the optimal configuration for how each quantum should be delivered to the thruster output, based on:

  • the effective fS obtained from the GNC phase’s TLA
  • the velocity vector of the incoming stream

In PopoDAC, the decisive factor for sound quality and spatial imaging is the pairing of:

  • TLA (from the GNC phase)
  • VVS (from the TDP phase)

These two form the dual core of PopoDAC’s time‑axis architecture.


Module 7: TLI(Timeline Interpolation)

The TLI provides the mechanism that converts bucket‑received data into thruster‑ready particles, just like the propulsion system of a spacecraft.


Its primary role is:

  • to re‑place each quantum according to the layout determined by VVS

But TLI has another major responsibility:


Interpolation.

Whenever the GNC phase detects a significant mismatch between:

  • the UAC axis (bucket/SOF axis)
  • and the MTL axis

the interpolation must act strongly.


If the mismatch is small, the interpolation load remains small.

But when VVS determines an ideal placement, tiny gaps may appear between quanta.

Residual jitter from the UAC side can also create such gaps.


If these gaps are left unfilled, holes appear in the timeline, producing large‑grain quantum noise.


What is Quantum Noise?

Quantum noise is indeed a form of micro‑error or “hole‑like” noise at the quantum level.

However, its auditory character is completely different from jitter‑induced click noise.


Click noise

  • sounds like “brrip” or “bzt”
  • represents a break in time itself
  • even tiny holes cause severe auditory damage

Quantum noise

  • is a single‑grain error inside the timeline, not a break in time
  • therefore does not puncture the flow of time
  • is perceived as:
  • “tiny dust drifting in the musical space — chiri, chirii — never interrupting time, just floating lightly.”


In real music, it feels like a microscopic speck of dust riding the flow of time.

Because it does not cut into the timeline, its perceptual impact is extremely small.

If sufficiently fine, it becomes negligible.


(Quantum noise is a natural byproduct of ASRC interpolation.

When properly controlled, it remains at the level of “air texture” within the soundstage.)


Module 8: TLT(Timeline Thruster)

The role of the TLT is deceptively simple:

  • It takes the “thruster‑ready fuel” prepared by TLI and loads it into the actual I2S DMA output stage.

That’s it.


“Oh—so this is finally the moment of ignition!”

Exactly.

But despite its simple appearance, the TLT carries the single most important and final responsibility in the entire PopoDAC architecture.


The Only Lock in PopoDAC

I’ve repeatedly stated:

  • “PopoDAC’s DDC never performs any lock.”

But that statement is only half true.


Because the final task of the TLT is:

  • to perform the one and only lock in the entire PopoDAC DDC.

“Wait—so it does lock!?”

Yes.

But only here, and only once.

Let’s revisit the PopoDAC CCC bicycle diagram.

The GNC phase has already succeeded in synchronizing the true timeline—MTL—from the UAC host all the way to the DDC.

To extend this synchronization through I2S and ultimately to the listener, one final gear is required.

That gear—the lock—is the I2S DMA.

What TLT Actually Does

When the TLT injects the thruster‑converted fuel into the I2S DMA, it must:

  • engage the DMA’s gear teeth perfectly,
  • align the MTL timeline with the physical I2S output,
  • and ensure the entire chain—Host → DDC → I2S → Listener—moves as one synchronized body.

This is the only lock in PopoDAC.

And this single lock is what enables full‑body synchronization across the entire audio path.


Implementation Example — Activation Layer

Now let’s move into the actual implementation.


Activation Unit

The TDP phase is triggered as a FreeRTOS task, so the main loop simply needs to launch it.


void app_main(void)

{

...

    // Start the I2S Write task

    ret_val = xTaskCreatePinnedToCore(i2s_write_task, "ForI2sWrite", TASK_I2S_WRITE_STACKSIZE, NULL, TASK_I2S_WRITE_PRIORITY, NULL, TASK_I2S_WRITE_CORE);

    ESP_LOGI(TAG, "%s to create %s", ret_val == pdPASS?"Succeeded":"Failed", "i2s_write_task");

...

}


Nothing unusual here — this task has appeared several times throughout the series.


Balancing the Three Real‑Time Layers

What is important is the relationship between the three real‑time phases:

  • TDR phase (UAC packet handling)
  • GNC phase (timeline guidance & navigation)
  • TDP phase (I2S thruster output)

All three are equally critical in terms of real‑time behavior.

As long as none of them is assigned an excessively dominant priority, the system remains stable.


However, TDR and TDP sit at opposite ends of the pipeline, and both carry substantial processing load.

Therefore, the only practical optimization is:

  • assigning them to different CPU cores.

This ensures that neither side starves the other, and the entire PopoDAC timing chain remains balanced.



Execution Unit — The Real Working Core of the TDP Phase

Just like the GNC phase, the TDP phase is implemented by arranging each module in a clean, sequential order.


void IRAM_ATTR i2s_write_task(void *param)

{

    static TU_ATTR_ALIGNED(32) DRAM_ATTR uint8_t local_buf[TRANSFER_BUFFER_SIZE * (TRANSFER_BUFFER_COUNT/2) ] = {0};

    TickType_t xLastWakeTime = xTaskGetTickCount();

    static size_t written = 0;

    static size_t got = 0;

    static int16_t i2s_size;


    i2s_size = g_ddc.uac_quality.frame_size>>I2S_BUFFER_STROKESIZE;


    while (1) {


        if (!g_ddc.uac_alt1_active) {

            vTaskDelayUntil(&xLastWakeTime, 1);

            continue;

        }


        // ---- I2S preroll ----

        if (g_ddc.i2s_starting) {

            if (!i2s_preroll_done(i2s_size)) {

                continue;

            }

            g_ddc.i2s_starting    = false;

            g_ddc.i2s_src_inited  = true;

            continue;

        }


        // ---- Underrun monitoring ----

        got = rb_available(&g_audio_ring);

        if (got < i2s_size) {

            g_ddc.ddc_ring_looses = g_ddc.ddc_ring_looses>=99?0:g_ddc.ddc_ring_looses+ 1;

        }


#if DDC_LOG == 1

        usb_packet_log_lastjoint(got);

#endif


        // ---- VVS ----

        g_ddc.i2s_src_phase_ratio = g_data_functions.pSRC_update_ratio(&g_ddc, g_cnt_ideal.delta_fb_q, g_cnt_ideal.source_clock_ratio);


        // ---- TLI ----

        g_data_functions.pASRC_interpolate_ring(&g_audio_ring, local_buf, i2s_size, &g_ddc);


        // ---- Volume ----

        if (g_ddc.uac_alt1_volume < 0) {

            g_data_functions.padjustVolume(

                local_buf, i2s_size,

                VOLUME_SCALE(g_ddc.uac_alt1_volume, vol_range.min)

            );

        }


        // ---- TLT ----

        i2s_channel_write(tx_handle, g_ddc.uac_alt1_muted ? g_silence : local_buf, i2s_size, &written, portMAX_DELAY);        

        g_ddc.ddc_tx_size = got;

    }

}


Processing Order

Including the parts not explicitly explained earlier, the actual execution order is:

  • (preroll) → (underrun monitoring) → VVS → TLI → (volume) → TLT

Because the upstream buffer resides on the MASTER RING, this is not a simple “bytes‑to‑bytes” pipeline.


The only byte buffer that exists here is local_buf, which serves as:

  • the bucket that holds the thruster‑converted quantum fuel.

The I2S DMA can only accept fuel delivered in bucket form, so TLI must prepare it and TLT must hand it over.


Detailed Behavior of Each Stage
(preroll) 

Handles the idle‑silent warm‑up when ALT1 is activated.

In an ordinary USB DAC, this preroll is often done inside the audio SOF before enabling I2S.

But in PopoDAC, the only synchronization target of the MTL is the I2S DMA itself, so idling must also occur here.


(underrun monitoring)

Not strictly required.

Its purpose is mainly:

  • debugging
  • improving visibility on the control panel


(volume)

Volume control contributes significantly to USB DAC usability.

If you want the device to follow the host’s volume adjustments, this is where it must be applied.


TLT:i2s_channel_write

This is the only lock point in PopoDAC.

  • portMAX_DELAY is the one and only correct choice.

PopoDAC also handles mute here.

The host does not send silent packets when muted; the device must handle muting on its own.


Conclusion — What the TDP Phase Actually Does

VVS

Determines the placement (velocity vector) of each quantum.


TLI

Re‑places the quanta and performs interpolation when needed.


TLT

Injects the quantum fuel into the I2S DMA — the only lock in PopoDAC.


Final Remarks

With this, we have completed the full explanation of every mission carried out under the command of the PopoDAC CCC.


How was it?


In the next episode, we will finally reveal:

  • What the completed PopoDAC looks like —
  • its actual specifications, its real‑world performance,
  • and how it behaves in practice.

We’ll walk through real photos and real examples.


Stay tuned.