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[Abyss Audio] (2) Simulation and Circuit Exploration: PopoCFA Clarity Discrete Operational Amplifier DIY

‹ 2026/06/23 ›

Good evening. This is the second installment of the DIY CFB‑type discrete op‑amp — today’s topic is circuit exploration.


We begin by searching for a circuit truly worthy of PopoCFA, and eventually reach the point where the V1 prototype is actually built… and then goes up in flames. Sweat


(The long gap since the previous article? Yes, yes — correcting the massive runaway & meltdown took a lot of time…)


In the end, after listening to PopoDAC and Popo BVPPC, I already knew what was missing.

So it was simply a matter of designing a circuit that could achieve the required performance.

But since I have no “career” in analog design, I proceed step by step, learning through experience.


To make PopoDAC fully shine — to “reproduce raindrop sounds with delicacy” — one thing is clear:


Beyond low distortion, an output stage with far higher slew rate than expected is required.


As mentioned previously, PopoDAC is a DAC that optimally re‑positions audio quanta within a micro‑time grid of 32‑bit/96 kHz or 24‑bit 96 kHz/512 fS (SOF → MTL).

The required output SR is 92 V/µs.


(Because PopoDAC performs time‑space reallocation of audio particles at that resolution.)


“Isn’t ~100 V/µs insanely difficult?”


Yes — if you consider this as the required SR at the output stage, it’s extremely tough.


For headphones, only carefully selected models might reproduce it.

For speakers, most modern commercial units are unusable for this purpose.


(After this series, I’ll start building a dedicated “raindrop reproduction speaker.” That will be fun.)


Headphones should be fully driven by a single Clarity module, so you can expect good results. Sweat


Target Goals

To capture the finely expanded audio‑quantum domain along the MTL timeline and deliver it into the listening space, a fast loop and strong error absorption are essential — hence a Current Feedback (CFB) architecture.


Let’s define the first major goal: driving headphones.


Main objectives:

Final SMID‑PCB usable as an op‑amp module

Include a power stage capable of driving headphones


Operation: Class A (bias ~40–50 mA)

Load: 32–62 Ω (common headphones)

GBW: 20 MHz (PM ~60°–80°)

SR: ≥100 V/µs

THD: ~0.01% (1 kHz, 1 Vpp)



Simulation Comparisons

First, let’s simulate several amplifier circuits and compare.


(1) OPA827 LM1875 Composite Amplifier

A non‑parallel version of a low‑distortion composite amp I built years ago.


SR = 7.14 V/µs

THD = 0.00148% (1 kHz, 6 Vpp)


LM1875’s spec allows up to ~8 V/µs, and THD is one digit better — respectable performance.

(It’s my main amp; sound quality is more than good enough for everyday listening.)


…but completely inadequate for PopoDAC. Sweat




(2) Popo BVPPC Headphone Amplifier

Next, the headphone amp built previously for PopoDAC.


SR = 8 V/µs

THD = 0.0268% (1 kHz, 3.6 Vpp)


OPA discrete composite structure, with a delicate headphone‑oriented power stage.

Unlike (1), the output error is entirely fed back into the op‑amp, preventing op‑amp coloration from being amplified downstream.


Simulation shows very clean square‑wave response.


Sound quality is excellent — once I started using it, I didn’t want to return to anything else.


…but it still couldn’t reproduce raindrops. Cry



(3)PopoVFA

A Voltage Feedback (VFB) design I initially thought might work.


SR = 15.8 V/µs

THD = 0.0050% (1 kHz, 3.6 Vpp)


Better performance than Popo BVPPC — promising.


Structure: differential input → VAS → bias → pre‑driver → power stage with active current source.

DC offset is 150 µV — seems viable as a real build.


(We’re getting closer — exciting!)



(4)PopoCFA Prototype

Now today’s main event: the PopoCFA Prototype simulation.


Based on insights from (3), I designed:

Voltage × current input → VAS → bias → pre‑driver → power stage with active current source.


SR = 150 V/µs  

THD = 0.0045% (1 kHz, 2.7 Vpp)


“Whoa!? It’s here — incredible!!”


PopoVFA required heavy GBW compensation to suppress ringing, but this CFA is insanely light and fast.


The number of transistors increases due to the current source, making implementation tiring — but the performance absolutely rewards the effort.


“This is worth building.” ^^



PopoCFA Prototype PCB

So I immediately made a prototype PCB.

Single‑channel PCB — two boards needed for stereo.


Actual size: ~40 mm × 40 mm.

Huge for an op‑amp, but compact considering it can directly drive headphones.



…or so I’d like to say, but the layout — especially the header pin placement — is bad from the start. Sweat

Yes, yes — I completely forgot I was designing a high‑speed CFB circuit when laying out the PCB. ><


Listening Test

Initially unaware of the layout issues, I was too excited after seeing the SR results.

I quickly assembled a prototype and began listening.



Power on → headphones on → play music…


A level of darkness and presence I’d never heard before — raindrops, fingertips in applause, everything audible.


“Whoa— amazing — the sound quality is on a different level — insane…”


But when I swapped to the second board for stereo…


Violent oscillation noise, music buried underneath, and then smoke. Sweat


“Oh no… I messed up…”


Reflection

I rebuilt several boards and tried again, but none were as stable as the first one. Cry


After destroying six PCBs and dozens of transistors, I finally identified the issues:

  • Active current source affects everything from input to output → weak against implementation error
  • Four‑diode fixed bias creates dangerous potential differences
  • Q β variations and total diode VF push the circuit into runaway territory
  • And… the circuit itself was bad


Improvements:

  • Layout must minimize capacitive loading for high‑speed circuits
  • Remove 4‑diode fixed bias → use VBE multiplier
  • Add several current‑limit points
  • Use a proper CV/CC bench supply for startup testing


In short:

Stabilize transistor behavior, add fine Class‑A/AB (effectively SR) adjustment, and use a proper bench supply.


A lot to reflect on. ^^


Next Time

Next time, we move on to the V2 operational circuit and implementation.

Will it reach a usable level?


Stay tuned♪